ASE Group

ASE Group
Public
Traded as NYSE: ASX
Industry Semiconductor assembly, testing & packaging
Founded 1984
Founders Jason Chang
Richard Chang
Headquarters Kaohsiung, Taiwan
Area served
 Worldwide
Revenue USD $8.72 billion (2015)
Number of employees
 65,695
Website www.aseglobal.com/en/

Advanced Semiconductor Engineering, Inc.(日月光半導體製造股份有限公司), also known as ASE Group(日月光集團), is a Taiwan-based provider of independent semiconductor assembling and test manufacturing services, with its headquarters in Kaohsiung, Taiwan.[1]

Overview

The company was founded in 1984 by brothers Jason Chang and Richard Chang, who opened its first factory in Kaohsiung, Taiwan.[2] Jason Chang currently serves as company chairman and is on the 2016 Forbes’ list of the world’s billionaires.[3]

As of April 1, 2016, the company's market cap was USD 8.77 billion.[4]

In May 2015, ASE Group entered into an agreement with TDK to establish a joint venture company in Kaohsiung, Taiwan, named ASE Embedded Electronics Inc. The company manufactures IC embedded substrates utilizing TDK’s SESUB technology.[5]

On May 26, 2016, ASE and Siliconware Precision Industries (SPIL) announced that they signed an agreement to form a new holding company, as part of the consolidation in the global semiconductor industry. Both companies said that each will retain its legal entities, management and staff, besides the current independent operations and operating models.[6] [7]

Technology

According to the market research firm Gartner, ASE is the largest Outsourced Semiconductor Assembly and Test (OSAT) provider, with 19 percent market share.[8] The company offers services such as semiconductor assembly, packaging and testing.[9] ASE provides semiconductor assembly and testing services for over 90 percent of electronics companies in the world.[10] The packaging services include fan-out wafer-level packaging (FO-WLP), wafer-level chip-scale packaging (WL-CSP), flip chip, 2.5D and 3D packaging, system in package (SiP) and copper wire bonding.[9][11]

Fan-out wafer-level packaging (FO-WLP), a process that enables ultra-thin, high-density packages, has been around for several years, and the fan-out technology is becoming an industry trend due to increasing market demand for smaller and thinner mobile products. According to the research firm Yole Développement, the fan-out packaging market is predicted to reach $2.4 billion by 2020, increasing from $174 million in 2014.[12]

Wafer-level chip-scale packaging (WL-CSP) is the technology that enables the smallest available packages in the market, meeting the increasing demand for smaller and faster portable consumer devices. This ultra-thin package type has integrated into mobile devices such as smartphones.[12] In October 2001, ASE began volume production of wafer-level chip-scale packages.[13]

Flip chip is a method of flipping over the chip to connect with either substrate or leadframe.[14] According to the research firm Yole Développement, the flip chip technology market value is expected to reach $25 billion in 2020. This market trend is mainly driven by mobile and wireless devices like tablets, computing applications such as servers, and consumer applications like smart TVs.[15]

2.5D packaging can enable hundreds of thousands of interconnects within a small package space.[16] This packaging technology is used in applications such as high memory bandwidth, network switches, router chips[16] and graphics cards for the gaming market.[17] Since 2007, ASE has been working with AMD to bring 2.5D packaging technology to market.[17] The two companies collaborated on Fiji, a 2.5D-based GPU processor designed for extreme gamers, which is small enough to fit a 6-inch PCB and connects 240,000 bumps.[18] In June 2015, Fiji was officially launched at the E3 gaming conference.[19]

System in Package (SiP) is the technology for bundling multiple ICs to work together inside a single package.[20] SiP technology is being driven by market application trends in wearables, mobile devices and Internet of Things (IoT).[21][22] In 2004, ASE was one of the first companies to begin mass production of SiP technology.[23] In April 2015, the company planned to double its SiP production capacity in the next 3 years.[22]

Facilities

The company’s main operations are in Kaohsiung, Taiwan, with other plants located in China, South Korea, Japan, Malaysia and Singapore. It also has offices and service centers in China, South Korea, Japan, Singapore, Belgium and the United States.[24]

On October 1, 2013, a water incident occurred at the ASE K7 facility.[25] In February 2014, officials from the Kaohsiung City Government and the Kaohsiung Environmental Protection Bureau (EPB) visited the K7 factory to evaluate the resumption of operations at the facility.[26] In December 2014, after checking the company’s improvement on wastewater treatment, the EPB officials agreed to allow the K7 facility to resume operations.[27]

From 2010 to 2013, ASE invested $25.3 million to build a water recycling plant, K14 in Kaohsiung, Taiwan. The K14 water treatment facility would process wastewater collected from ASE plants.[28]

References

  1. ↑ CNN Money. "Advanced Semiconductor Engineering Inc." May 12, 2016.
  2. ↑ "Milestones". aseglobal. Retrieved 12 October 2015.
  3. ↑ Russell Flannery. "Jason Chang". Forbes.
  4. ↑ Yahoo! Finance. “Advanced Semiconductor Engineering Inc. (ASX).” Retrieved April 1, 2016.
  5. ↑ By Mark LaPedus, Semiconductor Engineering. “The Week In Review: Manufacturing.” May 8, 2015. Retrieved August 18, 2016.
  6. ↑ By Shuli Ren, Barron's Asia. “ASE, SPIL: Finally, Happy Together; Bernstein Sees 37% Upside For ASE.” May 26, 2016. Retrieved November 14, 2016.
  7. ↑ By J.R. Wu, Reuters. “Taiwan's top two chip test firms ASE, SPIL plan new holding company.” May 26, 2016. Retrieved November 14, 2016.
  8. ↑ Ed Sperling, Semiconductor Engineering. "Foundries Versus OSATs." Jul 24, 2014. Retrieved May 19, 2016.
  9. 1 2 Yahoo! Finance. "ASE." Retrieved May 19, 2016.
  10. ↑ By Ding Yining, ShanghaiDaily.com. “ASE set to spend US$4b to lift income.” September 22, 2011. Retrieved August 18, 2016.
  11. ↑ IDC. "What’s Next for Semiconductor Packaging?." Retrieved May 19, 2016.
  12. 1 2 Mark LaPedus, Semiconductor Engineering. "Fan-Out Packaging Gains Steam." Nov 23, 2015. Retrieved May 31, 2016.
  13. ↑ EDN. "ASE Ramps Wafer Level CSP Production." Oct 12, 2001. Retrieved May 31, 2016.
  14. ↑ Darvin Edwards, Electronic Design. "Package Interconnects Can Make Or Break Performance." Sep 14, 2012. Retrieved Jun 6, 2016.
  15. ↑ i-Micronews. "Flip Chip: Technologies and Markets Trends." Sep 2015. Retrieved Jun 6, 2016.
  16. 1 2 Rick Merritt, EET Asia. "Semicon West highlights 10 chip trends." Jul 21, 2015. Retrieved Jun 6, 2016.
  17. 1 2 Ed Sperling, Semiconductor Engineering. "Is The 2.5D Supply Chain Ready?." Sep 28, 2015. Retrieved Jun 6, 2016.
  18. ↑ Mark LaPedus, Semiconductor Engineering. "The Week In Review: Manufacturing." Jul 17, 2015. Retrieved Jun 6, 2016.
  19. ↑ Francoise von Trapp, 3DInCites. "At AMD, Die Stacking Hits the Big Time." Jul 22, 2015. Retrieved Jun 6, 2016.
  20. ↑ Semiconductor Engineering. "System In Package." Retrieved Jun 13, 2016.
  21. ↑ Ed Sperling, Semiconductor Engineering. "Why Packaging Matters." Nov 19, 2015. Retrieved Jun 13, 2016.
  22. 1 2 Ken Liu, CENS. "ASE to Invest US$100-200 Bn. to Double SiP Capacity Over Three Years." Apr 15, 2015. Retrieved Jun 13, 2016.
  23. ↑ Roger Allan, Electronic Design. "SiP Really Packs It In." Nov 29, 2004. Retrieved Jun 13, 2016.
  24. ↑ Nasdaq. "ASX." Retrieved Jul 5, 2016.
  25. ↑ Jason Pan, Taipei Times. "Court reverses verdict in ASE pollution case." Sep 30, 2015. Retrieved Jul 5, 2016.
  26. ↑ Kathryn Chiu, The China Post. "Officials to review resumption of ASE K7 factory." Feb 14, 2014. Retrieved Jul 5, 2016.
  27. ↑ Chen Ja-fo, Jackson Chang and Scully Hsiao, Taiwan News. "ASE Kaohsiung plant to resume full operations soon." Dec 15, 2014. Retrieved Jul 5, 2016.
  28. ↑ Chiu Yu-Tzu, ZDNet. "ASE chair's apology for water pollution delivered." Dec 17, 2013. Retrieved Jul 5, 2016.

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