ZX Spectrum Contended Memory

Some of the ZX Spectrum's 64 KB addressable memory space is referred to as contended memory. With the rest of the memory, the Z80 microprocessor is the exclusive bus master, so its reads and writes operate at its full bus speed. Contended memory space, on the other hand, is shared between the ULA and the Z80 and the ULA has higher priority. Contended memory occupies addresses 0x4000..0x7FFF of the Z80 memory map. This is the first 16 KB of RAM in the 48 KB machine but the entire RAM of the 16 KB machine.

Contention occurs as a result of the ULA reading the display and attributes data in this RAM to produce the TV video display. Contention does therefore not occur during horizontal flyback, vertical flyback or during the screen border.

Accesses to I/O are also contended if the ULA must read contended memory while the Z80 must access a ULA I/O port. ULA I/O ports are those with an even address (address bit 0 is a 0).

The Z80 must wait whenever the ULA needs to access contended memory before proceeding with its own contended memory read or write. The effect to the user is that programs making use of contended memory or contended I/O run commensurately slower than those avoiding it altogether.

However, the ULA must wait for a Z80 read or write to complete before it can stop the Z80's clock and access the memory. As the ULA has no capacity to prefetch and store data in advance, it relies upon the memory being available to read to produce a clean and true video display. If an existing Z80 access is in progress when the ULA must read video data, the read is missed and the display shows blank white pixels in place of the correct video pixels. On the next frame, they may well be read correctly. The consequences of this often appeared as a flickering of missing pixels on the display, or 'snow' as it was also called. To avoid snow, some programs and games only copied data to the display on interrupt, as the Spectrum maskable interrupt was generated by the display vertical refresh signal. This ensures that as much of the display as possible was updated during the blanking and border time when video data was not used.

Circuit

The ULA does not use the Z80's bus request/grant mechanism to become bus master during its contended memory accesses. Instead, it extends the high period of the Z80 clock input to stop all microprocessor activity. While this is less elegant than performing a bus request, it does gain contended memory access in fewer Z80 clocks. This removes any need for the ULA to read display data in advance, a benefit with the crowded circuitry in the full ULA.

The ULA connects directly to the memory system ICs while the Z80 connects to them through isolating series current-limit resistors. This allows the ULA and memory to drive each other while the Z80 is also driving the memory. Using resistors instead of tristate bus driver ICs reduces the expense of the circuit but does take a higher average I/O pin current from the Z80, ULA and memory ICs.

References

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